The Resource Analysis and design of digital integrated circuits, David A. Hodges, Horace G. Jackson

Analysis and design of digital integrated circuits, David A. Hodges, Horace G. Jackson

Label
Analysis and design of digital integrated circuits
Title
Analysis and design of digital integrated circuits
Statement of responsibility
David A. Hodges, Horace G. Jackson
Creator
Contributor
Subject
Language
eng
Member of
Cataloging source
DLC
http://library.link/vocab/creatorDate
1937-
http://library.link/vocab/creatorName
Hodges, David A.
Illustrations
illustrations
Index
index present
LC call number
TK7868.D5
LC item number
H63 1983
Literary form
non fiction
Nature of contents
bibliography
http://library.link/vocab/relatedWorkOrContributorName
Jackson, Horace G
Series statement
McGraw-Hill series in electrical engineering. Electronics and electronic circuits
http://library.link/vocab/subjectName
  • Digital electronics
  • Integrated circuits
  • Digital electronics
  • Integrated circuits
  • Digitale integrierte Schaltung
  • Integrierte Schaltung
Label
Analysis and design of digital integrated circuits, David A. Hodges, Horace G. Jackson
Instantiates
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
volume
Carrier category code
nc
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
  • Digital Integrated Circuit Design
  • MOS Transistor Structure and Operation
  • CMOS Versus NMOS
  • Deep Submicron Interconnect
  • Computer-Aided Design of Digital Circuits
  • Circuit Simulation and Analysis
  • The Challenges Ahead
  • MOS Transistors
  • Structure and Operation of the MOS Transistor
  • Threshold Voltage of the MOS Transistor
  • Deep Submicron Digital IC Design
  • First-Order Current-Voltage Characteristics
  • Derivation of Velocity-Saturated Current Equations
  • Effect of High Fields
  • Current Equations for Velocity-Saturated Devices
  • Alpha-Power Law Model
  • Subthreshold Conduction
  • Capacitances of the MOS Transistor
  • Thin-Oxide Capacitance
  • pn Junction Capacitance
  • Overlap Capacitance
  • Brief History of IC Industry
  • Fabrication, Layout, and Simulation
  • IC Fabrication Technology
  • Overview of IC Fabrication Process
  • IC Photolithographic Process
  • Making Transistors
  • Making Wires
  • Wire Capacitance and Resistance
  • Layout Basics
  • Modeling the MOS Transistor for Circuit Simulation
  • MOS Models in SPICE
  • Review of Digital Logic Gate Design
  • Specifying MOS Transistors
  • SPICE MOS LEVEL 1 Device Model
  • Extraction of Parameters for MOS LEVEL 1
  • BSIM3 Model
  • Binning Process in BSIM3
  • Short-Channel Threshold Voltage
  • Mobility Model
  • Linear and Saturation Regions
  • Subthreshold Current
  • Capacitance Models
  • Basic Logic Functions
  • Implementation of Logic Circuits
  • Definition of Noise Margin
  • Definition of Transient Characteristics
  • Power Estimation
Dimensions
25 cm.
Extent
xiii, 434 pages
Isbn
9780070291539
Lccn
82014907
Media category
unmediated
Media MARC source
rdamedia
Media type code
n
Other physical details
illustrations
System control number
(OCoLC)8708098
Label
Analysis and design of digital integrated circuits, David A. Hodges, Horace G. Jackson
Publication
Bibliography note
Includes bibliographical references and index
Carrier category
volume
Carrier category code
nc
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
  • Digital Integrated Circuit Design
  • MOS Transistor Structure and Operation
  • CMOS Versus NMOS
  • Deep Submicron Interconnect
  • Computer-Aided Design of Digital Circuits
  • Circuit Simulation and Analysis
  • The Challenges Ahead
  • MOS Transistors
  • Structure and Operation of the MOS Transistor
  • Threshold Voltage of the MOS Transistor
  • Deep Submicron Digital IC Design
  • First-Order Current-Voltage Characteristics
  • Derivation of Velocity-Saturated Current Equations
  • Effect of High Fields
  • Current Equations for Velocity-Saturated Devices
  • Alpha-Power Law Model
  • Subthreshold Conduction
  • Capacitances of the MOS Transistor
  • Thin-Oxide Capacitance
  • pn Junction Capacitance
  • Overlap Capacitance
  • Brief History of IC Industry
  • Fabrication, Layout, and Simulation
  • IC Fabrication Technology
  • Overview of IC Fabrication Process
  • IC Photolithographic Process
  • Making Transistors
  • Making Wires
  • Wire Capacitance and Resistance
  • Layout Basics
  • Modeling the MOS Transistor for Circuit Simulation
  • MOS Models in SPICE
  • Review of Digital Logic Gate Design
  • Specifying MOS Transistors
  • SPICE MOS LEVEL 1 Device Model
  • Extraction of Parameters for MOS LEVEL 1
  • BSIM3 Model
  • Binning Process in BSIM3
  • Short-Channel Threshold Voltage
  • Mobility Model
  • Linear and Saturation Regions
  • Subthreshold Current
  • Capacitance Models
  • Basic Logic Functions
  • Implementation of Logic Circuits
  • Definition of Noise Margin
  • Definition of Transient Characteristics
  • Power Estimation
Dimensions
25 cm.
Extent
xiii, 434 pages
Isbn
9780070291539
Lccn
82014907
Media category
unmediated
Media MARC source
rdamedia
Media type code
n
Other physical details
illustrations
System control number
(OCoLC)8708098

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