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The Resource Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, edited by Pierre Wolper, (electronic resource)
Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, edited by Pierre Wolper, (electronic resource)
Resource Information
The item Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, edited by Pierre Wolper, (electronic resource) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in Boston University Libraries.This item is available to borrow from all library branches.
Resource Information
The item Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, edited by Pierre Wolper, (electronic resource) represents a specific, individual, material embodiment of a distinct intellectual or artistic creation found in Boston University Libraries.
This item is available to borrow from all library branches.
 Summary
 This volume constitutes the proceedings of the 7th International Conference on Computer Aided Verification, CAV '95, held in Liège, Belgium in July 1995. The book contains the 31 refereed full research papers selected for presentation at CAV '95 as well as abstracts or full papers of the three invited presentations. Originally oriented towards finitestate concurrent systems, CAV now covers all styles of verification approaches and a variety of application areas. The papers included range from theoretical issues to concrete applications with a certain emphasis on verification tools and the algorithms and techniques needed for their implementations. Beyond finitestate systems, realtime systems and hybrid systems are an important part of the conference
 Language
 eng
 Extent
 XII, 456 p.
 Contents

 Multipliers and dividers: Insights on arithmetic circuit verification (extended abstract)
 Global rebuilding of OBDDs avoiding memory requirement maxima
 Generating BDD models for process algebra terms
 Hardware verification using monadic secondorder logic
 Verifying safety properties of a class of infinitestate distributed algorithms
 Model checking for infinite state systems using data abstraction, assumptioncommitment style reasoning and theorem proving
 CAVEAT: technique and tool for computer aided verification and transformation
 An integration of model checking with automated proof checking
 Automatic datapath abstraction in hardware systems
 Toupie=?calculus+constraints
 Safety property verification of Esterel programs and applications to telecommunications software
 Methods for Mucalculus model checking: A tutorial
 Efficient checking of behavioural relations and modal assertions using fixedpoint inversion
 It usually works: The temporal logic of stochastic systems
 Local liveness for compositional modeling of fair reactive systems
 Trace theoretic verification of asynchronous circuits using unfoldings
 From duration calculus to linear hybrid automata
 Local model checking for realtime systems
 Algorithmic analysis of nonlinear hybrid systems
 On polynomialsize programs winning finitestate games
 The rabin index and chain automata, with applications to automata and games
 An automatatheoretic approach to fair realizability and synthesis
 Supervisory control of finite state machines
 Compositional and inductive semantic definitions in fixpoint, equational, constraint, closurecondition, rulebased and gametheoretic form
 Utilizing symmetry when model checking under fairness assumptions: An automatatheoretic approach
 Augmenting branching temporal logics with existential quantification over atomic propositions
 Modelling asynchrony with a synchronous model
 On the model checking problem for branching time logics and basic parallel processes
 Using formal verification/analysis methods on the critical path in system design: A case study
 Automated analysis of an audio control protocol
 Interactively verifying a simple realtime scheduler
 Verification of realtime systems by successive over and under approximation
 Efficient timing analysis of a class of Petri nets
 Verifying ?regular properties for a subclass of linear hybrid systems
 Isbn
 9783540494133
 Label
 Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings
 Title
 Computer Aided Verification
 Title remainder
 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings
 Statement of responsibility
 edited by Pierre Wolper
 Subject

 Artificial intelligence
 Computer Science
 Computer science
 Electronic resources
 Electronics
 Electronics and Microelectronics, Instrumentation
 Logic design
 Logics and Meanings of Programs
 Mathematical Logic and Formal Languages
 Software Engineering
 Software engineering
 Special Purpose and ApplicationBased Systems
 Artificial Intelligence (incl. Robotics)
 Language
 eng
 Summary
 This volume constitutes the proceedings of the 7th International Conference on Computer Aided Verification, CAV '95, held in Liège, Belgium in July 1995. The book contains the 31 refereed full research papers selected for presentation at CAV '95 as well as abstracts or full papers of the three invited presentations. Originally oriented towards finitestate concurrent systems, CAV now covers all styles of verification approaches and a variety of application areas. The papers included range from theoretical issues to concrete applications with a certain emphasis on verification tools and the algorithms and techniques needed for their implementations. Beyond finitestate systems, realtime systems and hybrid systems are an important part of the conference
 http://library.link/vocab/creatorName
 Wolper, Pierre
 Image bit depth
 0
 LC call number

 QA76.9.L63
 QA76.5913
 QA76.63
 Literary form
 non fiction
 http://library.link/vocab/relatedWorkOrContributorName
 SpringerLink
 Series statement
 Lecture Notes in Computer Science,
 Series volume
 939
 http://library.link/vocab/subjectName

 Computer science
 Software engineering
 Logic design
 Artificial intelligence
 Electronics
 Computer Science
 Logics and Meanings of Programs
 Software Engineering
 Mathematical Logic and Formal Languages
 Electronics and Microelectronics, Instrumentation
 Special Purpose and ApplicationBased Systems
 Artificial Intelligence (incl. Robotics)
 Label
 Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, edited by Pierre Wolper, (electronic resource)
 Antecedent source
 mixed
 Carrier category
 online resource
 Carrier category code

 cr
 Carrier MARC source
 rdacarrier
 Color
 not applicable
 Content category
 text
 Content type code

 txt
 Content type MARC source
 rdacontent
 Contents
 Multipliers and dividers: Insights on arithmetic circuit verification (extended abstract)  Global rebuilding of OBDDs avoiding memory requirement maxima  Generating BDD models for process algebra terms  Hardware verification using monadic secondorder logic  Verifying safety properties of a class of infinitestate distributed algorithms  Model checking for infinite state systems using data abstraction, assumptioncommitment style reasoning and theorem proving  CAVEAT: technique and tool for computer aided verification and transformation  An integration of model checking with automated proof checking  Automatic datapath abstraction in hardware systems  Toupie=?calculus+constraints  Safety property verification of Esterel programs and applications to telecommunications software  Methods for Mucalculus model checking: A tutorial  Efficient checking of behavioural relations and modal assertions using fixedpoint inversion  It usually works: The temporal logic of stochastic systems  Local liveness for compositional modeling of fair reactive systems  Trace theoretic verification of asynchronous circuits using unfoldings  From duration calculus to linear hybrid automata  Local model checking for realtime systems  Algorithmic analysis of nonlinear hybrid systems  On polynomialsize programs winning finitestate games  The rabin index and chain automata, with applications to automata and games  An automatatheoretic approach to fair realizability and synthesis  Supervisory control of finite state machines  Compositional and inductive semantic definitions in fixpoint, equational, constraint, closurecondition, rulebased and gametheoretic form  Utilizing symmetry when model checking under fairness assumptions: An automatatheoretic approach  Augmenting branching temporal logics with existential quantification over atomic propositions  Modelling asynchrony with a synchronous model  On the model checking problem for branching time logics and basic parallel processes  Using formal verification/analysis methods on the critical path in system design: A case study  Automated analysis of an audio control protocol  Interactively verifying a simple realtime scheduler  Verification of realtime systems by successive over and under approximation  Efficient timing analysis of a class of Petri nets  Verifying ?regular properties for a subclass of linear hybrid systems
 Dimensions
 unknown
 Extent
 XII, 456 p.
 File format
 multiple file formats
 Form of item
 electronic
 Isbn
 9783540494133
 Level of compression
 uncompressed
 Media category
 computer
 Media MARC source
 rdamedia
 Media type code

 c
 Other control number
 10.1007/3540600450
 Other physical details
 online resource.
 Quality assurance targets
 absent
 Reformatting quality
 access
 Specific material designation
 remote
 System control number
 (DEHe213)9783540494133
 Label
 Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, edited by Pierre Wolper, (electronic resource)
 Antecedent source
 mixed
 Carrier category
 online resource
 Carrier category code

 cr
 Carrier MARC source
 rdacarrier
 Color
 not applicable
 Content category
 text
 Content type code

 txt
 Content type MARC source
 rdacontent
 Contents
 Multipliers and dividers: Insights on arithmetic circuit verification (extended abstract)  Global rebuilding of OBDDs avoiding memory requirement maxima  Generating BDD models for process algebra terms  Hardware verification using monadic secondorder logic  Verifying safety properties of a class of infinitestate distributed algorithms  Model checking for infinite state systems using data abstraction, assumptioncommitment style reasoning and theorem proving  CAVEAT: technique and tool for computer aided verification and transformation  An integration of model checking with automated proof checking  Automatic datapath abstraction in hardware systems  Toupie=?calculus+constraints  Safety property verification of Esterel programs and applications to telecommunications software  Methods for Mucalculus model checking: A tutorial  Efficient checking of behavioural relations and modal assertions using fixedpoint inversion  It usually works: The temporal logic of stochastic systems  Local liveness for compositional modeling of fair reactive systems  Trace theoretic verification of asynchronous circuits using unfoldings  From duration calculus to linear hybrid automata  Local model checking for realtime systems  Algorithmic analysis of nonlinear hybrid systems  On polynomialsize programs winning finitestate games  The rabin index and chain automata, with applications to automata and games  An automatatheoretic approach to fair realizability and synthesis  Supervisory control of finite state machines  Compositional and inductive semantic definitions in fixpoint, equational, constraint, closurecondition, rulebased and gametheoretic form  Utilizing symmetry when model checking under fairness assumptions: An automatatheoretic approach  Augmenting branching temporal logics with existential quantification over atomic propositions  Modelling asynchrony with a synchronous model  On the model checking problem for branching time logics and basic parallel processes  Using formal verification/analysis methods on the critical path in system design: A case study  Automated analysis of an audio control protocol  Interactively verifying a simple realtime scheduler  Verification of realtime systems by successive over and under approximation  Efficient timing analysis of a class of Petri nets  Verifying ?regular properties for a subclass of linear hybrid systems
 Dimensions
 unknown
 Extent
 XII, 456 p.
 File format
 multiple file formats
 Form of item
 electronic
 Isbn
 9783540494133
 Level of compression
 uncompressed
 Media category
 computer
 Media MARC source
 rdamedia
 Media type code

 c
 Other control number
 10.1007/3540600450
 Other physical details
 online resource.
 Quality assurance targets
 absent
 Reformatting quality
 access
 Specific material designation
 remote
 System control number
 (DEHe213)9783540494133
Subject
 Artificial intelligence
 Computer Science
 Computer science
 Electronic resources
 Electronics
 Electronics and Microelectronics, Instrumentation
 Logic design
 Logics and Meanings of Programs
 Mathematical Logic and Formal Languages
 Software Engineering
 Software engineering
 Special Purpose and ApplicationBased Systems
 Artificial Intelligence (incl. Robotics)
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<div class="citation" vocab="http://schema.org/"><i class="fa faexternallinksquare fafw"></i> Data from <span resource="http://link.bu.edu/portal/ComputerAidedVerification7thInternational/2BsMv0Cm0w/" typeof="Book http://bibfra.me/vocab/lite/Item"><span property="name http://bibfra.me/vocab/lite/label"><a href="http://link.bu.edu/portal/ComputerAidedVerification7thInternational/2BsMv0Cm0w/">Computer Aided Verification : 7th International Conference, CAV '95 Liège, Belgium, July 3–5, 1995 Proceedings, edited by Pierre Wolper, (electronic resource)</a></span>  <span property="potentialAction" typeOf="OrganizeAction"><span property="agent" typeof="LibrarySystem http://library.link/vocab/LibrarySystem" resource="http://link.bu.edu/"><span property="name http://bibfra.me/vocab/lite/label"><a property="url" href="http://link.bu.edu/">Boston University Libraries</a></span></span></span></span></div>