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The Resource Correct Hardware Design and Verification Methods : IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings, edited by George J. Milne, Laurence Pierre, (electronic resource)

Correct Hardware Design and Verification Methods : IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings, edited by George J. Milne, Laurence Pierre, (electronic resource)

Label
Correct Hardware Design and Verification Methods : IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings
Title
Correct Hardware Design and Verification Methods
Title remainder
IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings
Statement of responsibility
edited by George J. Milne, Laurence Pierre
Creator
Contributor
Editor
Provider
Subject
Language
eng
Summary
These proceedings contain the papers presented at the Advanced Research Working Conference on Correct Hardware Design Methodologies, held in Arles, France, in May 1993, and organized by the ESPRIT Working Group 6018 CHARME-2and the Universit de Provence, Marseille, in cooperation with IFIP Working Group 10.2. Formal verification is emerging as a plausible alternative to exhaustive simulation for establishing correct digital hardware designs. The validation of functional and timing behavior is a major bottleneck in current VLSI design systems, slowing the arrival of products in the marketplace with its associated increase in cost. From being a predominantly academic area of study until a few years ago, formal design and verification techniques are now beginning to migrate into industrial use. As we are now witnessing an increase in activity in this area in both academia and industry, the aim of this working conference was to bring together researchers and users from both communities
Member of
http://library.link/vocab/creatorName
Milne, George J
Image bit depth
0
LC call number
QA76.635
Literary form
non fiction
http://library.link/vocab/relatedWorkOrContributorName
  • Pierre, Laurence.
  • SpringerLink
Series statement
Lecture Notes in Computer Science,
Series volume
683
http://library.link/vocab/subjectName
  • Computer science
  • Microprogramming
  • Memory management (Computer science)
  • Data transmission systems
  • Logic design
  • Electronics
  • Computer Science
  • Control Structures and Microprogramming
  • Arithmetic and Logic Structures
  • Memory Structures
  • Input/Output and Data Communications
  • Logic Design
  • Electronics and Microelectronics, Instrumentation
Label
Correct Hardware Design and Verification Methods : IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings, edited by George J. Milne, Laurence Pierre, (electronic resource)
Instantiates
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
A graph-based method for timing diagrams representation and verification -- A Petri Net approach for the analysis of VHDL descriptions -- Temporal analysis of time bounded digital systems -- Strongly-typed theory of structures and behaviours -- Verification and diagnosis of digital systems by ternary reasoning -- Logic verification of incomplete functions and design error location -- A methodology for system-level design for verifiability -- Algebraic models and the correctness of microprocessors -- Combining symbolic evaluation and object oriented approach for verifying processor-like architectures at the RT-level -- A theory of generic interpreters -- Towards verifying large(r) systems: A strategy and an experiment -- Advancements in symbolic traversal techniques -- Automatic verification of speed-independent circuit designs using the Circal system -- Correct compilation of specifications to deterministic asynchronous circuits -- DDD-FM9001: Derivation of a verified microprocessor -- Calculational derivation of a counter with bounded response time -- Towards a provably correct hardware implementation of occam -- Rewriting with constraints in T-ruby -- Embedding hardware verification within a commercial design framework -- An approach to formalization of data flow graphs
Dimensions
unknown
Extent
IX, 275 p.
File format
multiple file formats
Form of item
electronic
Isbn
9783540706557
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/BFb0021709
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-540-70655-7
Label
Correct Hardware Design and Verification Methods : IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings, edited by George J. Milne, Laurence Pierre, (electronic resource)
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
A graph-based method for timing diagrams representation and verification -- A Petri Net approach for the analysis of VHDL descriptions -- Temporal analysis of time bounded digital systems -- Strongly-typed theory of structures and behaviours -- Verification and diagnosis of digital systems by ternary reasoning -- Logic verification of incomplete functions and design error location -- A methodology for system-level design for verifiability -- Algebraic models and the correctness of microprocessors -- Combining symbolic evaluation and object oriented approach for verifying processor-like architectures at the RT-level -- A theory of generic interpreters -- Towards verifying large(r) systems: A strategy and an experiment -- Advancements in symbolic traversal techniques -- Automatic verification of speed-independent circuit designs using the Circal system -- Correct compilation of specifications to deterministic asynchronous circuits -- DDD-FM9001: Derivation of a verified microprocessor -- Calculational derivation of a counter with bounded response time -- Towards a provably correct hardware implementation of occam -- Rewriting with constraints in T-ruby -- Embedding hardware verification within a commercial design framework -- An approach to formalization of data flow graphs
Dimensions
unknown
Extent
IX, 275 p.
File format
multiple file formats
Form of item
electronic
Isbn
9783540706557
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/BFb0021709
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-540-70655-7

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