The Resource Debugging Systems-on-Chip : Communication-centric and Abstraction-based Techniques, by Bart Vermeulen, Kees Goossens, (electronic resource)

Debugging Systems-on-Chip : Communication-centric and Abstraction-based Techniques, by Bart Vermeulen, Kees Goossens, (electronic resource)

Label
Debugging Systems-on-Chip : Communication-centric and Abstraction-based Techniques
Title
Debugging Systems-on-Chip
Title remainder
Communication-centric and Abstraction-based Techniques
Statement of responsibility
by Bart Vermeulen, Kees Goossens
Creator
Contributor
Author
Provider
Subject
Language
eng
Summary
This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly. Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug flow to be used during the design of an SOC, and customizable off-chip debugger software. Coverage includes an evaluation of the efficiency and effectiveness of the CSAR approach and its supporting infrastructure, using six industrial SOCs and an illustrative, example SOC model. The authors also quantify the hardware cost and design effort to support their approach. • Describes trends in embedded system design that make the design of SOCs complex and error-prone; • Analyzes four key requirements for debugging a modern, silicon SOC implementation and identifies nine factors that complicate meeting these debug requirements; • Uses communication control for debugging SOCs, which can be used with most on-chip SOC communication protocols in use today; • Uses communication control to (re)create a particular transaction order and demonstrates that this is helpful in the localization of errors in a SOC implementation; • Demonstrates the necessity of extracting locally- and globally-consistent states during SOC debug and guarantees by design that they are so; • Uses a fast and scalable event distribution interconnect, which connects on-chip monitors and protocol specific instruments); • Evaluates benefits and costs of the CSAR approach using six industrial SOC designs and an example SOC model
Member of
http://library.link/vocab/creatorName
Vermeulen, Bart
Image bit depth
0
LC call number
TK7888.4
Literary form
non fiction
http://library.link/vocab/relatedWorkOrContributorName
  • Goossens, Kees.
  • SpringerLink
Series statement
Embedded Systems,
http://library.link/vocab/subjectName
  • Engineering
  • Computer science
  • Electronics
  • Systems engineering
  • Engineering
  • Circuits and Systems
  • Processor Architectures
  • Electronics and Microelectronics, Instrumentation
Label
Debugging Systems-on-Chip : Communication-centric and Abstraction-based Techniques, by Bart Vermeulen, Kees Goossens, (electronic resource)
Instantiates
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Part I Introduction -- Introduction -- Part II The Complexity of debugging system chips -- Post-silicon debugging of a single building block -- Post-silicon debugging of multiple building blocks -- Part III The CSAR debug approach -- CSAR debug overview -- On-chip debug architecture -- Design-for-Debug flow -- Off-chip debugger software -- Part IV Case studies -- Case studies -- Part V Related work, conclusion, and future work -- Related work -- Conclusion and future work
Dimensions
unknown
Extent
XV, 311 p. 127 illus., 7 illus. in color.
File format
multiple file formats
Form of item
electronic
Isbn
9783319062426
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-319-06242-6
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-319-06242-6
Label
Debugging Systems-on-Chip : Communication-centric and Abstraction-based Techniques, by Bart Vermeulen, Kees Goossens, (electronic resource)
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Part I Introduction -- Introduction -- Part II The Complexity of debugging system chips -- Post-silicon debugging of a single building block -- Post-silicon debugging of multiple building blocks -- Part III The CSAR debug approach -- CSAR debug overview -- On-chip debug architecture -- Design-for-Debug flow -- Off-chip debugger software -- Part IV Case studies -- Case studies -- Part V Related work, conclusion, and future work -- Related work -- Conclusion and future work
Dimensions
unknown
Extent
XV, 311 p. 127 illus., 7 illus. in color.
File format
multiple file formats
Form of item
electronic
Isbn
9783319062426
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-319-06242-6
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-319-06242-6

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