The Resource Designing 2D and 3D Network-on-Chip Architectures, by Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch, (electronic resource)

Designing 2D and 3D Network-on-Chip Architectures, by Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch, (electronic resource)

Label
Designing 2D and 3D Network-on-Chip Architectures
Title
Designing 2D and 3D Network-on-Chip Architectures
Statement of responsibility
by Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch
Creator
Contributor
Author
Provider
Subject
Language
eng
Summary
This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliabilty. Case studies are used to illuminate new design methodologies. · Describes essential theory, practice and state-of-the-art applications of 2D and 3D Network-on-Chip interconnect; · Enables readers to exploit parallelism in processor architecture, with interconnect design that is efficient in terms of energy and performance; · Covers topics not available in other books, such as NoC and distributed memory organization, dynamic memory management and abstract data type support in many-core platforms, and distributed hierarchical power management
http://library.link/vocab/creatorName
Tatas, Konstantinos
Image bit depth
0
LC call number
TK7888.4
Literary form
non fiction
http://library.link/vocab/relatedWorkOrContributorName
  • Siozios, Kostas.
  • Soudris, Dimitrios.
  • Jantsch, Axel.
  • SpringerLink
http://library.link/vocab/subjectName
  • Engineering
  • Computer science
  • Electronics
  • Systems engineering
  • Engineering
  • Circuits and Systems
  • Electronics and Microelectronics, Instrumentation
  • Processor Architectures
Label
Designing 2D and 3D Network-on-Chip Architectures, by Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch, (electronic resource)
Instantiates
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Part I: Network-on-Chip Design Methodology -- Network-on-Chip Technology: A Paradigm Shift -- NoC Modeling and Topology Exploration -- Communication Architecture -- Power and Thermal Effects and Management -- NoC-based System Integration -- NoC Verification and Testing -- The Spidergon STNoC -- Middleware Memory Management in NoC -- On Designing 3-D Platforms -- The SYSMANTIC NoC Design and Prototyping Framework -- Part II: Suggested Projects.- Projects on Network-on Chip
Dimensions
unknown
Extent
XIII, 265 p. 144 illus., 79 illus. in color.
File format
multiple file formats
Form of item
electronic
Isbn
9781461442745
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-1-4614-4274-5
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-1-4614-4274-5
Label
Designing 2D and 3D Network-on-Chip Architectures, by Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch, (electronic resource)
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Part I: Network-on-Chip Design Methodology -- Network-on-Chip Technology: A Paradigm Shift -- NoC Modeling and Topology Exploration -- Communication Architecture -- Power and Thermal Effects and Management -- NoC-based System Integration -- NoC Verification and Testing -- The Spidergon STNoC -- Middleware Memory Management in NoC -- On Designing 3-D Platforms -- The SYSMANTIC NoC Design and Prototyping Framework -- Part II: Suggested Projects.- Projects on Network-on Chip
Dimensions
unknown
Extent
XIII, 265 p. 144 illus., 79 illus. in color.
File format
multiple file formats
Form of item
electronic
Isbn
9781461442745
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-1-4614-4274-5
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-1-4614-4274-5

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