The Resource Electromigration Modeling at Circuit Layout Level, by Cher Ming Tan, Feifei He, (electronic resource)

Electromigration Modeling at Circuit Layout Level, by Cher Ming Tan, Feifei He, (electronic resource)

Label
Electromigration Modeling at Circuit Layout Level
Title
Electromigration Modeling at Circuit Layout Level
Statement of responsibility
by Cher Ming Tan, Feifei He
Creator
Contributor
Author
Provider
Subject
Language
eng
Summary
Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level
Member of
http://library.link/vocab/creatorName
Tan, Cher Ming
Image bit depth
0
LC call number
  • TA169.7
  • T55-T55.3
  • TA403.6
Literary form
non fiction
http://library.link/vocab/relatedWorkOrContributorName
  • He, Feifei.
  • SpringerLink
Series statement
SpringerBriefs in Applied Sciences and Technology,
http://library.link/vocab/subjectName
  • Engineering
  • System safety
  • Engineering
  • Quality Control, Reliability, Safety and Risk
  • Electronic Circuits and Devices
  • Atomic, Molecular, Optical and Plasma Physics
Label
Electromigration Modeling at Circuit Layout Level, by Cher Ming Tan, Feifei He, (electronic resource)
Instantiates
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Introduction -- 3D Circuit Model Construction and Simulation -- Comparison of EM Performance in Circuit Structure and Test Structure -- Interconnect EM Reliability Modeling at Circuit Layout Level -- Conclusion
Dimensions
unknown
Extent
IX, 103 p. 75 illus., 2 illus. in color.
File format
multiple file formats
Form of item
electronic
Isbn
9789814451215
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-981-4451-21-5
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-981-4451-21-5
Label
Electromigration Modeling at Circuit Layout Level, by Cher Ming Tan, Feifei He, (electronic resource)
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Introduction -- 3D Circuit Model Construction and Simulation -- Comparison of EM Performance in Circuit Structure and Test Structure -- Interconnect EM Reliability Modeling at Circuit Layout Level -- Conclusion
Dimensions
unknown
Extent
IX, 103 p. 75 illus., 2 illus. in color.
File format
multiple file formats
Form of item
electronic
Isbn
9789814451215
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-981-4451-21-5
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-981-4451-21-5

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