Coverart for item
The Resource Field Programmable Logic and Application : 14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004. Proceedings, edited by Jürgen Becker, Marco Platzner, Serge Vernalde, (electronic resource)

Field Programmable Logic and Application : 14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004. Proceedings, edited by Jürgen Becker, Marco Platzner, Serge Vernalde, (electronic resource)

Label
Field Programmable Logic and Application : 14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004. Proceedings
Title
Field Programmable Logic and Application
Title remainder
14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004. Proceedings
Statement of responsibility
edited by Jürgen Becker, Marco Platzner, Serge Vernalde
Creator
Contributor
Editor
Provider
Subject
Language
eng
Summary
This book constitutes the refereed proceedings of the 14th International Conference on Field-Programmable Logic, FPL 2003, held in Leuven, Belgium in August/September 2004. The 78 revised full papers, 45 revised short papers, and 29 poster abstracts presented together with 3 keynote contributions and 3 tutorial summaries were carefully reviewed and selected from 285 papers submitted. The papers are organized in topical sections on organic and biologic computing, security and cryptography, platform-based design, algorithms and architectures, acceleration application, architecture, physical design, arithmetic, multitasking, circuit technology, network processing, testing, applications, signal processing, computational models and compiler, dynamic reconfiguration, networks and optimisation algorithms, system-on-chip, high-speed design, image processing, network-on-chip, power-aware design, IP-based design, co-processing architectures, system level design, physical interconnect, computational models, cryptography and compression, network applications and architecture, and debugging and test
Member of
http://library.link/vocab/creatorName
Becker, Jürgen
Image bit depth
0
LC call number
QA76.9.L63
Literary form
non fiction
http://library.link/vocab/relatedWorkOrContributorName
  • Platzner, Marco.
  • Vernalde, Serge.
  • SpringerLink
Series statement
Lecture Notes in Computer Science,
Series volume
3203
http://library.link/vocab/subjectName
  • Computer science
  • Logic design
  • Computer Communication Networks
  • Computer aided design
  • Computer engineering
  • Computer Science
  • Logic Design
  • Processor Architectures
  • Computer Communication Networks
  • Computer-Aided Engineering (CAD, CAE) and Design
  • Electrical Engineering
Label
Field Programmable Logic and Application : 14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004. Proceedings, edited by Jürgen Becker, Marco Platzner, Serge Vernalde, (electronic resource)
Instantiates
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Plenary Keynotes -- Organic and Biology Computing -- Security and Cryptography 1 -- Platform Based Design -- Algorithms and Architectures -- Acceleration Application 1 -- Architecture 1 -- Physical Design 1 -- Arithmetic 1 -- Multitasking -- Circuit Technology -- Memory 1 -- Network Processing -- Testing -- Applications -- Arithmetic 2 -- Signal Processing 1 -- Computational Models and Compiler -- Dynamic Reconfiguration 1 -- Network and Optimization Algorithms -- System-on-Chip 1 -- High Speed Design -- Security and Cryptography 2 -- Architectures 2 -- Memory 2 -- Image Processing 1 -- Network-on-Chip -- Power Aware Design 1 -- IP-Based Design -- Power Aware Design 2 -- Coprocessing Architectures -- Embedded Tutorials -- Dynamic Reconfiguration 2 -- Physical Design 2 -- Acceleration Application 2 -- System Level Design -- Physical Interconnect -- Computational Models -- Acceleration Applications 3 -- Arithmetic 3 -- Signal Processing 2 -- System-on-Chip 2 -- Image Processing 2 -- Cryptography and Compression -- Network Applications and Architectures -- Network on Chip and Adaptive Architectures -- Debugging and Test -- Organic and Biology Computing (Poster) -- Security and Cryptography (Poster) -- Mapping and Compilers (Poster) -- Architectures (Poster) -- Algorithms and IP (Poster) -- Image Processing (Poster) -- PhD Forum (Poster)
Dimensions
unknown
Extent
LVIII, 1202 p.
File format
multiple file formats
Form of item
electronic
Isbn
9783540301172
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/b99787
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-540-30117-2
Label
Field Programmable Logic and Application : 14th International Conference, FPL 2004, Leuven, Belgium, August 30-September 1, 2004. Proceedings, edited by Jürgen Becker, Marco Platzner, Serge Vernalde, (electronic resource)
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Plenary Keynotes -- Organic and Biology Computing -- Security and Cryptography 1 -- Platform Based Design -- Algorithms and Architectures -- Acceleration Application 1 -- Architecture 1 -- Physical Design 1 -- Arithmetic 1 -- Multitasking -- Circuit Technology -- Memory 1 -- Network Processing -- Testing -- Applications -- Arithmetic 2 -- Signal Processing 1 -- Computational Models and Compiler -- Dynamic Reconfiguration 1 -- Network and Optimization Algorithms -- System-on-Chip 1 -- High Speed Design -- Security and Cryptography 2 -- Architectures 2 -- Memory 2 -- Image Processing 1 -- Network-on-Chip -- Power Aware Design 1 -- IP-Based Design -- Power Aware Design 2 -- Coprocessing Architectures -- Embedded Tutorials -- Dynamic Reconfiguration 2 -- Physical Design 2 -- Acceleration Application 2 -- System Level Design -- Physical Interconnect -- Computational Models -- Acceleration Applications 3 -- Arithmetic 3 -- Signal Processing 2 -- System-on-Chip 2 -- Image Processing 2 -- Cryptography and Compression -- Network Applications and Architectures -- Network on Chip and Adaptive Architectures -- Debugging and Test -- Organic and Biology Computing (Poster) -- Security and Cryptography (Poster) -- Mapping and Compilers (Poster) -- Architectures (Poster) -- Algorithms and IP (Poster) -- Image Processing (Poster) -- PhD Forum (Poster)
Dimensions
unknown
Extent
LVIII, 1202 p.
File format
multiple file formats
Form of item
electronic
Isbn
9783540301172
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/b99787
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-540-30117-2

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