Coverart for item
The Resource Field-Programmable Logic and Applications : 5th International Workshop, FPL '95 Oxford, United Kingdom, August 29–September 1, 1995 Proceedings, edited by Will Moore, Wayne Luk, (electronic resource)

Field-Programmable Logic and Applications : 5th International Workshop, FPL '95 Oxford, United Kingdom, August 29–September 1, 1995 Proceedings, edited by Will Moore, Wayne Luk, (electronic resource)

Label
Field-Programmable Logic and Applications : 5th International Workshop, FPL '95 Oxford, United Kingdom, August 29–September 1, 1995 Proceedings
Title
Field-Programmable Logic and Applications
Title remainder
5th International Workshop, FPL '95 Oxford, United Kingdom, August 29–September 1, 1995 Proceedings
Statement of responsibility
edited by Will Moore, Wayne Luk
Creator
Contributor
Editor
Provider
Subject
Language
eng
Summary
This volume constitutes the proceedings of the Fifth International Workshop on Field-Programmable Logic and Its Applications, FPL '95, held in Oxford, UK in August/September 1995. The volume presents 46 full revised papers carefully selected by the program committee from a large number and wide range of submissions. The papers document the progress achieved since the predecessor conference (see LNCS 849). They are organized in sections on architectures, platforms, tools, arithmetic and signal processing, embedded systems and other applications, and reconfigurable design and models
Member of
http://library.link/vocab/creatorName
Moore, Will
Image bit depth
0
LC call number
QA76.9.L63
Literary form
non fiction
http://library.link/vocab/relatedWorkOrContributorName
  • Luk, Wayne.
  • SpringerLink
Series statement
Lecture Notes in Computer Science,
Series volume
975
http://library.link/vocab/subjectName
  • Computer science
  • Logic design
  • Computer aided design
  • Electronics
  • Telecommunication
  • Computer Science
  • Logic Design
  • Electronics and Microelectronics, Instrumentation
  • Computer-Aided Engineering (CAD, CAE) and Design
  • Communications Engineering, Networks
Label
Field-Programmable Logic and Applications : 5th International Workshop, FPL '95 Oxford, United Kingdom, August 29–September 1, 1995 Proceedings, edited by Will Moore, Wayne Luk, (electronic resource)
Instantiates
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
The design of a new FPGA architecture -- Migration of a dual granularity globally interconnected PLD architecture to a 0.5? TLM process -- Self-timed FPGA systems -- The XC6200 FastMapTM processor interface -- The Teramac configurable compute engine -- Telecommunication-oriented FPGA and dedicated CAD system -- A configurable logic processor for machine vision -- Extending DSP-boards with FPGA-based structures of interconnection -- High-speed region detection and labeling using an FPGA-based custom computing platform -- Using FPGAS as control support in MIMD executions -- Customised hardware based on the REDOC III algorithm for high performance data ciphering -- Using reconfigurable hardware to speed up product development and performance -- Creation of hardware objects in a reconfigurable computer -- Rapid hardware prototyping of Digital Signal Processing systems using Field Programmable Gate Arrays -- Delay minimal mapping of RTL structures onto LUT based FPGAs -- Some notes on power management on FPGA-based systems -- An automatic technique for realising user interaction processing in PLD based systems -- Proper use of hierarchy in HDL-based high density FGPA design -- Compiling regular arrays onto FPGAs -- Compiling Ruby into FPGAs -- The CSYN verilog compiler and other tools -- A VHDL design methodology for FPGAs -- VHDL-based rapid hardware prototyping using FPGA technology -- Integer programming for partitioning in software oriented codesign -- Test standard serves dual role as on-board programming solution -- Advanced method for industry related education with an FPGA design self-learning kit -- FPGA implementation of a rational adder -- FPLD-implementation of computations over finite fields GF(2m) with applications to error control coding -- Implementation of Fast Fourier Transforms and Discrete Cosine Transforms in FPGAs -- Implementation of a 2-D fast Fourier transform on an FPGA-based custom computing machine -- An assessment of the suitability of FPGA-based systems for use in digital signal processing -- An FPGA prototype for a multiplierless FIR filter built using the logarithmic number system -- Bit-serial FIR filters with CSD coefficients for FPGAs -- A self-validating temperature sensor implemented in FPGAs -- Developing interface libraries for reconfigurable data acquisition boards -- Prototype generation of application specific embedded controllers for microsystems -- A hardware genetic algorithm for the traveling salesman problem on Splash 2 -- Modular architecture for real-time astronomical image processing with FPGA -- A programmable I/O system for real-time AC drive control applications -- Reconfigurable logic for fault tolerance -- Supercomputing with reconfigurable architectures -- Automatic synthesis of parallel programs targeted to dynamically reconfigurable logic arrays -- Prototyping environment for dynamically reconfigurable logic -- Implementation approaches for reconfigurable logic applications -- Use of reconfigurability in variable-length code detection at video rates -- Classification and performance of reconfigurable architectures
Dimensions
unknown
Extent
XII, 456 p.
File format
multiple file formats
Form of item
electronic
Isbn
9783540447863
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/3-540-60294-1
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-540-44786-3
Label
Field-Programmable Logic and Applications : 5th International Workshop, FPL '95 Oxford, United Kingdom, August 29–September 1, 1995 Proceedings, edited by Will Moore, Wayne Luk, (electronic resource)
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
The design of a new FPGA architecture -- Migration of a dual granularity globally interconnected PLD architecture to a 0.5? TLM process -- Self-timed FPGA systems -- The XC6200 FastMapTM processor interface -- The Teramac configurable compute engine -- Telecommunication-oriented FPGA and dedicated CAD system -- A configurable logic processor for machine vision -- Extending DSP-boards with FPGA-based structures of interconnection -- High-speed region detection and labeling using an FPGA-based custom computing platform -- Using FPGAS as control support in MIMD executions -- Customised hardware based on the REDOC III algorithm for high performance data ciphering -- Using reconfigurable hardware to speed up product development and performance -- Creation of hardware objects in a reconfigurable computer -- Rapid hardware prototyping of Digital Signal Processing systems using Field Programmable Gate Arrays -- Delay minimal mapping of RTL structures onto LUT based FPGAs -- Some notes on power management on FPGA-based systems -- An automatic technique for realising user interaction processing in PLD based systems -- Proper use of hierarchy in HDL-based high density FGPA design -- Compiling regular arrays onto FPGAs -- Compiling Ruby into FPGAs -- The CSYN verilog compiler and other tools -- A VHDL design methodology for FPGAs -- VHDL-based rapid hardware prototyping using FPGA technology -- Integer programming for partitioning in software oriented codesign -- Test standard serves dual role as on-board programming solution -- Advanced method for industry related education with an FPGA design self-learning kit -- FPGA implementation of a rational adder -- FPLD-implementation of computations over finite fields GF(2m) with applications to error control coding -- Implementation of Fast Fourier Transforms and Discrete Cosine Transforms in FPGAs -- Implementation of a 2-D fast Fourier transform on an FPGA-based custom computing machine -- An assessment of the suitability of FPGA-based systems for use in digital signal processing -- An FPGA prototype for a multiplierless FIR filter built using the logarithmic number system -- Bit-serial FIR filters with CSD coefficients for FPGAs -- A self-validating temperature sensor implemented in FPGAs -- Developing interface libraries for reconfigurable data acquisition boards -- Prototype generation of application specific embedded controllers for microsystems -- A hardware genetic algorithm for the traveling salesman problem on Splash 2 -- Modular architecture for real-time astronomical image processing with FPGA -- A programmable I/O system for real-time AC drive control applications -- Reconfigurable logic for fault tolerance -- Supercomputing with reconfigurable architectures -- Automatic synthesis of parallel programs targeted to dynamically reconfigurable logic arrays -- Prototyping environment for dynamically reconfigurable logic -- Implementation approaches for reconfigurable logic applications -- Use of reconfigurability in variable-length code detection at video rates -- Classification and performance of reconfigurable architectures
Dimensions
unknown
Extent
XII, 456 p.
File format
multiple file formats
Form of item
electronic
Isbn
9783540447863
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/3-540-60294-1
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-3-540-44786-3

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