The Resource Guide to RISC Processors : for Programmers and Engineers, by Sivarama P. Dandamudi, (electronic resource)

Guide to RISC Processors : for Programmers and Engineers, by Sivarama P. Dandamudi, (electronic resource)

Label
Guide to RISC Processors : for Programmers and Engineers
Title
Guide to RISC Processors
Title remainder
for Programmers and Engineers
Statement of responsibility
by Sivarama P. Dandamudi
Creator
Contributor
Author
Provider
Subject
Language
eng
Summary
Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium. This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here. Features: *Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience *Presents material in a manner suitable for flexible self-study • Assembly language programs permit reader executables using the SPIM simulator • Integrates core concepts to processor designs and their implementations • Supplies extensive and complete programming examples and figures • Contains chapter-by-chapter overviews and summaries * Provides source code for the MIPS language at the book’s website Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource. Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization. Key Topics * Processor design issues * Evolution of CISC and RISC processors * MIPS, SPARC, PowerPC, Itanium, and ARM architectures * MIPS assembly language * SPIM simulator and debugger * Conditional execution * Floating-point and logical and shift operations * Number systems Computer Architecture/Programming Beginning/Intermediate Level
Member of
http://library.link/vocab/creatorName
Dandamudi, Sivarama P
Image bit depth
0
LC call number
TK7895.M5
Literary form
non fiction
http://library.link/vocab/relatedWorkOrContributorName
SpringerLink
http://library.link/vocab/subjectName
  • Computer science
  • Microprogramming
  • Computer network architectures
  • Software engineering
  • Computer Science
  • Processor Architectures
  • Control Structures and Microprogramming
  • Software Engineering/Programming and Operating Systems
  • Computer Systems Organization and Communication Networks
  • Programming Techniques
Label
Guide to RISC Processors : for Programmers and Engineers, by Sivarama P. Dandamudi, (electronic resource)
Instantiates
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
  • cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operations -- Recursion -- Floating-Point Operations
Dimensions
unknown
Extent
XV, 387 p.
File format
multiple file formats
Form of item
electronic
Isbn
9780387274461
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
  • c
Other control number
10.1007/b139084
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-0-387-27446-1
Label
Guide to RISC Processors : for Programmers and Engineers, by Sivarama P. Dandamudi, (electronic resource)
Publication
Antecedent source
mixed
Carrier category
online resource
Carrier category code
  • cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operations -- Recursion -- Floating-Point Operations
Dimensions
unknown
Extent
XV, 387 p.
File format
multiple file formats
Form of item
electronic
Isbn
9780387274461
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
  • c
Other control number
10.1007/b139084
Other physical details
online resource.
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
(DE-He213)978-0-387-27446-1

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