The Resource Shared memory multiprocessing, edited by Norihisa Suzuki

Shared memory multiprocessing, edited by Norihisa Suzuki

Label
Shared memory multiprocessing
Title
Shared memory multiprocessing
Statement of responsibility
edited by Norihisa Suzuki
Contributor
Subject
Language
eng
Cataloging source
DLC
Illustrations
illustrations
Index
no index present
LC call number
QA76.5
LC item number
.S4445 1992
Literary form
non fiction
Nature of contents
bibliography
http://library.link/vocab/relatedWorkOrContributorDate
1946-
http://library.link/vocab/relatedWorkOrContributorName
Suzuki, Norihisa
http://library.link/vocab/subjectName
  • Multiprocessors
  • Memory management (Computer science)
  • Multiprocesseurs
  • Gestion mémoire (Informatique)
  • Memory management (Computer science)
  • Multiprocessors
  • Multiprocessorsystemen
  • Computergeheugen
  • Management
  • Gemeinsamer Speicher
  • Mehrprozessorsystem
Label
Shared memory multiprocessing, edited by Norihisa Suzuki
Instantiates
Publication
Bibliography note
Includes bibliographical references
Carrier category
volume
Carrier category code
  • nc
Carrier MARC source
rdacarrier
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
  • Experience with the Firefly multiprocessor workstation / Susan Owicki -- Design and evaluation of snoop-cache-based multiprocessor, TOP-1 / Shigenori Shimizu [and others] -- Symbolic computation algorithms on shared memory multiprocessors / E.M. Clarke [and others] -- Experimental evaluation of algorithmic performance on two shared memory multiprocessors / Anand Sivasubramaniam [and others] -- Formal verification of the gigamax cache consistency protocol / Kenneth McMillan and James Schwalbe -- An evaluation of cache coherence protocols for multiprocessors / Sandra Johnson Baylor, Kevin P. McAuliffe, and Bharat D. Rathi -- KRPP : the Kyushu University reconfigurable parallel processor : cache architecture and cache coherence schemes / Kazuaki Murakami [and others] -- MUSTARD : a multiprocessor UNIX for embedded real-time systems / Shuichi Hiroya, Takeshi Momoi, and Katsutoshi Nihei
  • An empirical investigation of the effectiveness and limitations of automatic parallelization / Jaswinder Pal Singh and John L. Hennessy -- Fine-grain loop scheduling for MIMD machines / Carrie J. Brownhill, Ki-chang Kim, and Alexandru Nicolau -- Restructuring a parallel simulator to improve cache behavior / David R. Cheriton, Hendrik A. Goosen, and Philip Machanick -- A replay mechanism for mostly functional parallel programs / Robert H. Halstead, Jr., and David A. Kranz -- Abstracting data-representation and partitioning-scheduling in parallel programs / Gail A. Alverson and David Notkin -- Latency tolerance through multithreading in large-scale multiprocessors / Kiyoshi Kurihara, David Chaiken, and Anant Agarwal
  • Cenju : a multiprocessor system with a distributed shared memory scheme for modular circuit simulation / Toshiyuki Nakata [and others] -- Overview and status of the Stanford DASH multiprocessor / Daniel Lenoski [and others] -- An analysis of shared-memory synchronization mechanisms / Philip J. Woest and James R. Goodman -- A cache coherence mechanism for scalable, shared-memory multiprocessors / Steven Scott -- Dynamic pointer allocation for scalable cache coherence directories / Richard Simoni and Mark Horowitz -- Fault-tolerant design for multistage routing networks / André DeHon, Thomas Knight, Jr., and Henry Minsky
Dimensions
24 cm
Extent
x, 510 pages
Isbn
9780262193221
Lccn
92023489
Media category
unmediated
Media MARC source
rdamedia
Media type code
  • n
Other physical details
illustrations
System control number
  • (OCoLC)26361975
  • (OCoLC)ocm26361975
Label
Shared memory multiprocessing, edited by Norihisa Suzuki
Publication
Bibliography note
Includes bibliographical references
Carrier category
volume
Carrier category code
  • nc
Carrier MARC source
rdacarrier
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
  • Experience with the Firefly multiprocessor workstation / Susan Owicki -- Design and evaluation of snoop-cache-based multiprocessor, TOP-1 / Shigenori Shimizu [and others] -- Symbolic computation algorithms on shared memory multiprocessors / E.M. Clarke [and others] -- Experimental evaluation of algorithmic performance on two shared memory multiprocessors / Anand Sivasubramaniam [and others] -- Formal verification of the gigamax cache consistency protocol / Kenneth McMillan and James Schwalbe -- An evaluation of cache coherence protocols for multiprocessors / Sandra Johnson Baylor, Kevin P. McAuliffe, and Bharat D. Rathi -- KRPP : the Kyushu University reconfigurable parallel processor : cache architecture and cache coherence schemes / Kazuaki Murakami [and others] -- MUSTARD : a multiprocessor UNIX for embedded real-time systems / Shuichi Hiroya, Takeshi Momoi, and Katsutoshi Nihei
  • An empirical investigation of the effectiveness and limitations of automatic parallelization / Jaswinder Pal Singh and John L. Hennessy -- Fine-grain loop scheduling for MIMD machines / Carrie J. Brownhill, Ki-chang Kim, and Alexandru Nicolau -- Restructuring a parallel simulator to improve cache behavior / David R. Cheriton, Hendrik A. Goosen, and Philip Machanick -- A replay mechanism for mostly functional parallel programs / Robert H. Halstead, Jr., and David A. Kranz -- Abstracting data-representation and partitioning-scheduling in parallel programs / Gail A. Alverson and David Notkin -- Latency tolerance through multithreading in large-scale multiprocessors / Kiyoshi Kurihara, David Chaiken, and Anant Agarwal
  • Cenju : a multiprocessor system with a distributed shared memory scheme for modular circuit simulation / Toshiyuki Nakata [and others] -- Overview and status of the Stanford DASH multiprocessor / Daniel Lenoski [and others] -- An analysis of shared-memory synchronization mechanisms / Philip J. Woest and James R. Goodman -- A cache coherence mechanism for scalable, shared-memory multiprocessors / Steven Scott -- Dynamic pointer allocation for scalable cache coherence directories / Richard Simoni and Mark Horowitz -- Fault-tolerant design for multistage routing networks / André DeHon, Thomas Knight, Jr., and Henry Minsky
Dimensions
24 cm
Extent
x, 510 pages
Isbn
9780262193221
Lccn
92023489
Media category
unmediated
Media MARC source
rdamedia
Media type code
  • n
Other physical details
illustrations
System control number
  • (OCoLC)26361975
  • (OCoLC)ocm26361975

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