The Resource VLSI for artificial intelligence, edited by José G. Delgado-Frias, Will R. Moore

VLSI for artificial intelligence, edited by José G. Delgado-Frias, Will R. Moore

Label
VLSI for artificial intelligence
Title
VLSI for artificial intelligence
Statement of responsibility
edited by José G. Delgado-Frias, Will R. Moore
Contributor
Subject
Genre
Language
eng
Member of
Cataloging source
DLC
Illustrations
illustrations
Index
index present
LC call number
Q336
LC item number
.V57 1989
Literary form
non fiction
Nature of contents
bibliography
http://library.link/vocab/relatedWorkOrContributorName
  • Delgado-Frias, José G
  • Moore, Will R
Series statement
  • The Kluwer international series in engineering and computer science
  • VLSI, computer architecture, and digital signal processing
Series volume
68.
http://library.link/vocab/subjectName
  • Artificial intelligence
  • Integrated circuits
  • système base connaissance
  • mémoire
  • architecture ordinateur
  • intelligence artificielle
  • VLSI
  • réseau neuronal
  • architecture neuronale
  • machine PROLOG
  • Intelligence artificielle
  • Circuits intégrés à très grande échelle
  • Artificial intelligence
  • Integrated circuits
  • Computerarchitektur
  • Integrierte Schaltung
  • Künstliche Intelligenz
  • Neuronales Netz
  • PROLOG (Programmiersprache)
  • Programmiersprache
  • VLSI
  • Intelligence artificielle
  • Circuits intégrés à très grande échelle
  • Künstliche Intelligenz
  • VLSI
  • Kongress
  • VLSI
  • architecture neuronale
  • architecture ordinateur
  • intelligence artificielle
  • machine PROLOG
  • mémoire
  • réseau neuronal
  • système base connaissance
Label
VLSI for artificial intelligence, edited by José G. Delgado-Frias, Will R. Moore
Instantiates
Publication
Bibliography note
Includes bibliographies and index
Carrier category
volume
Carrier category code
  • nc
Carrier MARC source
rdacarrier
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
  • From low level semantic description of Prolog to instruction set and VLSI design / Reinhard Eck -- A 32 bit processor for compiled Prolog / Pierluigi Civera [and others] -- CARMEL-1 : a VLSI architecture for flat concurrent Prolog / Ran Ginosar and Arie Harsat -- VLSI for parallel execution of Prolog / Jeff Reynolds and Sergio Delgado-Rannauro -- Supporting functional and logic programming languages through a data parallel VLSI architecture / John O'Donnell -- Translating declaratively specified knowledge and usage requirements into a reconfigurable machine / Richard Frost, Subir Bandyopadhyay and Dimitris Phoukas -- VLSI-appropriate garbage collection support / Steven Krueger
  • A self-timed circuit for a Prolog machine / Yves Bekkers [and others] -- VLSI and rule-based systems / Peter Kogge [and others] -- Unify with active memory / Yan Ng, Raymond Glover and Chew-Lye Chng -- The pattern addressable memory : hardware for associative processing / Ian Robinson -- A high performance relational algebraic processor for large knowledge bases / Simon Lavington, Jerome Robinson, and Kai-Yau Mok -- A WSI semantic network architecture / José Delgado-Frias and Will Moore -- A VLSI implementation of multilayered neural networks / Bernard Faure and Guy Mazaré -- A fully digital integrated CMOS Hopfield network including the learning algorithm / Michel Weinfeld
  • A neural network for 3-D VLSI accelerator / Tadashi Ae and Reiji Aibara -- Shift invariant associative memory / Donald Prados and Subhash Kak -- VLSI bit-serial neural networks / Zöe Butler, Alan Murray and Anthony Smith -- A new CMOS architecture for neural networks / Michel Verleysen, Bruno Sirletti and Paul Jespers -- A limited-interconnect, highly layered synthetic neural architecture / Lex Akers [and others] -- VLSI-design of associative network / Ulrich Rückert and Karl Goser -- Fully programmable analogue VLSI devices for the implementation of neural networks / Alan Murray, Anthony Smith and Lionel Tarassenko -- Are special chips necessary for neural computing? / Igor Aleksander
  • A VLSI systolic array dedicated to Hopfield neural network / François Blayo and Philippe Hurat -- An integrated system for neural network simulations / Simon Garth and Danny Pike
Dimensions
25 cm.
Extent
xii, 274 pages
Isbn
9780792390008
Lccn
88037254
Media category
unmediated
Media MARC source
rdamedia
Media type code
  • n
Other physical details
illustrations
System control number
(OCoLC)18948601
Label
VLSI for artificial intelligence, edited by José G. Delgado-Frias, Will R. Moore
Publication
Bibliography note
Includes bibliographies and index
Carrier category
volume
Carrier category code
  • nc
Carrier MARC source
rdacarrier
Content category
text
Content type code
  • txt
Content type MARC source
rdacontent
Contents
  • From low level semantic description of Prolog to instruction set and VLSI design / Reinhard Eck -- A 32 bit processor for compiled Prolog / Pierluigi Civera [and others] -- CARMEL-1 : a VLSI architecture for flat concurrent Prolog / Ran Ginosar and Arie Harsat -- VLSI for parallel execution of Prolog / Jeff Reynolds and Sergio Delgado-Rannauro -- Supporting functional and logic programming languages through a data parallel VLSI architecture / John O'Donnell -- Translating declaratively specified knowledge and usage requirements into a reconfigurable machine / Richard Frost, Subir Bandyopadhyay and Dimitris Phoukas -- VLSI-appropriate garbage collection support / Steven Krueger
  • A self-timed circuit for a Prolog machine / Yves Bekkers [and others] -- VLSI and rule-based systems / Peter Kogge [and others] -- Unify with active memory / Yan Ng, Raymond Glover and Chew-Lye Chng -- The pattern addressable memory : hardware for associative processing / Ian Robinson -- A high performance relational algebraic processor for large knowledge bases / Simon Lavington, Jerome Robinson, and Kai-Yau Mok -- A WSI semantic network architecture / José Delgado-Frias and Will Moore -- A VLSI implementation of multilayered neural networks / Bernard Faure and Guy Mazaré -- A fully digital integrated CMOS Hopfield network including the learning algorithm / Michel Weinfeld
  • A neural network for 3-D VLSI accelerator / Tadashi Ae and Reiji Aibara -- Shift invariant associative memory / Donald Prados and Subhash Kak -- VLSI bit-serial neural networks / Zöe Butler, Alan Murray and Anthony Smith -- A new CMOS architecture for neural networks / Michel Verleysen, Bruno Sirletti and Paul Jespers -- A limited-interconnect, highly layered synthetic neural architecture / Lex Akers [and others] -- VLSI-design of associative network / Ulrich Rückert and Karl Goser -- Fully programmable analogue VLSI devices for the implementation of neural networks / Alan Murray, Anthony Smith and Lionel Tarassenko -- Are special chips necessary for neural computing? / Igor Aleksander
  • A VLSI systolic array dedicated to Hopfield neural network / François Blayo and Philippe Hurat -- An integrated system for neural network simulations / Simon Garth and Danny Pike
Dimensions
25 cm.
Extent
xii, 274 pages
Isbn
9780792390008
Lccn
88037254
Media category
unmediated
Media MARC source
rdamedia
Media type code
  • n
Other physical details
illustrations
System control number
(OCoLC)18948601

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